address
A hexadecimal integer or one of the following register names:
Title not available (Syntax )
- r0
- r31
General registers
- fr0l,
fr0r, fr1l,...,
fr31l, fr31r
Single-precision floating-point registers; these
64 registers correlate to the left and right halves of the double-precision
floating-point registers having the corresponding numbers
- fr0
- fr31
Double-precision floating-point registers
- sr0
- sr7
Space registers
- cr0
- cr31
Control registers
- rctr
Recovery counter
- pidr1
- pidr4
Protection identifiers
- ccr
Coprocessor configuration register
- sar
Shift amount register
- iva
Interruption vector address
- eiem
External interrupt enable mask
- itmr
Interval timer
- pcsq,
pcoq (or pcspace,
npcspace)
Interruption instruction address space and offset
queues
- iir,
isr, ior
Interruption parameter registers
- ipsw
Interruption processor status word
- eirr
External interrupt request register
- tt0
- tr7, ppda,
hta
Temporary registers (usable only by code executing
at the most privileged level)
- rp
Return link
- t1
- t4
Temporary registers
- arg0
- arg3
Argument words
- dp
Data pointer
- ret0
Return value
- ret1,
sl
Return value, static link
- sp
Stack pointer
- mrp
Millicode return link
- sret,
sarg
Return value, argument
- farg0
- farg3
Floating arguments
- fret
Return value
- sflags
Status flag
The register indirection operator, parentheses (()),
allows you to refer to the contents of the contents of a register.
This operator is particularly useful with the dump
and watchpoint
commands.