HP 3000 Manuals

General Information Manual

Appendix A  HP Precision Architecture 

Foundation for the Next-GenerationHP 3000s 

HP Precision Architecture-RISC (PA-RISC), incorporated in the
900 Series systems, is the foundation for HP 3000 computer systems for
the 1990s and beyond.  PA-RISC is a reduced-complexity architecture that
is based on reduced instruction set computing (RISC) principles, coupled
with key architectural extensions.  The advantages of PA-RISC
directly translate into high performance and industry leadership in
price/performance and cost of ownership in commercial online transaction
processing (OLTP) environments.

PA-RISC maximizes the performance benefits that can be realized for a
given semiconductor technology.  This potential allows for the
development of high-performance systems that provide a cost-effective,
compatible growth path designed to meet continually growing performance
requirements in commercial environments.  PA-RISC's inherent simplicity
is ideal for fast, single-chip microprocessors that can be used for
cost-effective desktop, workgroup, and corporate mainframe-class systems.

Finally, the 900 Series systems provide both object and source code
compatibility with other HP 3000 systems, thereby preserving
investments in application software and providing a smooth migration to
next-generation 900 Series HP 3000 systems.

Designed to last 

A key design objective of PA-RISC was to ensure that the architecture
would be able to meet evolving computing needs and to take full advantage
of new hardware and software technologies.  Providing an architecture
with high-performance potential and the capability to support a broad,
compatible family of products was the first step.  Next, PA-RISC was
designed to accommodate multiprocessors and high-availability extensions,
unlike the majority of today's systems, which must attempt to force-fit
such features into existing architectures.  Future PA-RISC systems can
take advantage of these capabilities to meet expanding requirements for
system performance and availability.

Finally, provisions have been made to ensure that the architecture has a
large degree of flexibility and expandability.  For example, industry
analysts have estimated that addressability requirements of systems
double every year.  By allowing for either 48- or 64-bit virtual
addressing, PA-RISC systems will be able to provide sufficient
expandability to meet these growing requirements.  Consider that 64-bit
addressing provides over 4 billion times the addressing capability of
typical 32-bit systems!  It all adds up to an architecture designed to
last through the 1990s and into the 21st century.

Key features 

   *   reduced instruction set
   *   32-bit, fixed-format instructions
   *   48-bit or 64-bit virtual addresses
   *   hardwired, single-cycle instruction execution
   *   32 general-purpose registers
   *   hardware support for floating-point and decimal calculations
   *   multiprocessors and coprocessors

Reasons for RISC 

In the late 1970s and early 1980s, research in industry and at several
leading universities showed that computers tend to spend most of their
time performing relatively simple functions.  In addition to directly
supporting such simple functions in the instruction set, conventional
computer systems typically provide instructions for many complex
functions as well.  For commercial workloads on conventional systems, 80
percent or more of the time is spent executing very simple instructions
such as add, load, branch, and store.  Only about 20 percent of the time
is spent executing relatively complex instructions.  Implementation of
complex instructions results in additional processor overhead, which
often results in a performance penalty for all instructions.


          Figure A-1.  RISC Motivations 

Researchers concluded that optimizing the processor for the simple,
often-executed functions would result in a significant performance
advantage over more conventional designs.  Thus, the RISC approach:
maximize system performance by optimizing the processor for the simple,
often-executed functions.  PA-RISC not only embodies RISC principles, it
also provides significant architectural extensions that allow for true
high-performance, cost-effective business solutions.

MPE/iX 5.0 Documentation