HP 3000 Manuals HP 3000 Manuals
Data Alignment Pragma
This section discusses the HP_ALIGN data alignment pragma and the
differences between the data alignment architectures of the MPE/iX and
MPE/V systems.
The HP_ALIGN data alignment pragma allows you to control the alignment of
fields within structures and unions. It facilitates the interchange of
data between MPE systems having different data alignment architectures.
Data alignment architectures specify the number of bits allocated to
store various data types, whether a data type is aligned on a byte,
two-byte, word, or double word boundary, and padding among bit-fields.
The differences in data alignment architectures are especially important
to consider when passing data from one machine to another.
The HP_ALIGN pragma facilitates transferring data among MPE V and MPE/iX
systems and when accessing TurboImage databases from HP C/iX.
The syntax for the HP_ALIGN pragma is:
#pragma HP_ALIGN {MPE_16}
{POP }
The MPE_16 option directs the HP C/iX compiler to set the alignment of
int, float, and double in structures and unions to be aligned according
to the MPE/V alignment scheme. This option also sets the alignment of
structures and unions to start and end on at least a half-word boundary.
The POP option turns off the HP_ALIGN pragma and alignment reverts to
word (32-bit) alignment.[REV END]
[REV BEG] For
example:
#pragma HP_ALIGN MPE_16
struct {char a; double b; int c;} d;
#pragma HP_ALIGN POP
[REV END][REV BEG]
Comparison of MPE/V and MPE/iX Data Alignment
MPE/V systems align data within structures and unions differently than
MPE/iX systems. The data alignment rules for these two systems are
described using the following code fragment for comparison purposes:
______________________________________________________________
| |
| struct x { |
| char y[3]; |
| short z; |
| char w[5]; |
| }; |
| |
| struct q { |
| char n; |
| struct x v[2]; |
| double u; |
| char t; |
| int s:6; |
| char m; |
| } a = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,|
| 20.0,21,22,23}; |
______________________________________________________________
Figure 9-2. Code Fragment for Comparing Storage and Alignment
[REV END]
[REV
BEG]
Native Data Alignment on HP C/iX.
Figure 9-3 shows how the data in Figure 9-2 is stored in memory when
using HP C/iX. The values are shown above the variable names. Memory
locations containing shading are padding bytes.[REV END]
[REV
BEG]
![[]](../../pic3k/M011986/FFN53c50.gif)
Figure 9-3. Storage with HP C/iX
[REV END]
[REV
BEG]
The structure a is aligned on an 8-byte boundary because the most
restrictive data type within the structure is the double u.
Table 9-2 shows the padding for the example code fragment:
Table 9-2. Padding on HP 9000 Series 700/800 and HP 3000 Series 900
---------------------------------------------------------------------------------------------
| | |
| Padding Location | Reason for Padding |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+1 | Aligns the structure x on a 2-byte boundary because the most |
| | restrictive member is short. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+5 | Aligns the short z on a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+13 | Fills out the struct x to a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+17 | Aligns the short z on a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+25 | Fills out the structure to a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+26 through a+31 | Aligns the double u on an 8-byte boundary. The bit-field s begins |
| | immediately after the previous item at a+41. Two bits of padding is |
| | necessary to align the next byte properly. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+43 through a+47 | Fills out the struct q to an 8-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
Data Alignment Using HP_ALIGN MPE_16.
When the sample code fragment is compiled and run using the HP_ALIGN
MPE_16 pragma, data is stored as shown in Figure 9-4 .[REV END]
[REV
BEG]
![[]](../../pic3k/M011986/FFN63c50.gif)
Figure 9-4. Storage Using the HP_ALIGN MPE_16 Pragma
[REV END]
[REV
BEG]
Table 9-3 shows the padding for the example code fragment when using
HP_ALIGN MPE_16:
Table 9-3. Padding Using the HP_ALIGN MPE_16 Pragma
---------------------------------------------------------------------------------------------
| | |
| Padding Location | Reason For Padding |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+1 | Within structures, align structure x on a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+5 | Aligns the short z on a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+13 | Structures within structures are aligned on a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+17 | Aligns the short z on a 2-byte boundary. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+25 | Doubles are 2-byte aligned within structures. |
| | |
---------------------------------------------------------------------------------------------
| | |
| a+36 | Aligns char m on a byte boundary. |
| | |
---------------------------------------------------------------------------------------------
The differences between the HP_ALIGN MPE_16 and the native MPE/iX
alignments are:
* MPE/V aligned records are aligned on a 2-byte boundary. MPE/iX
aligned records are aligned according to the most restrictive data
type within the structure.
* MPE/V aligned doubles are 2-byte aligned. MPE/iX aligned doubles
are 8-byte aligned within structures.
* MPE/V aligned long doubles, available in ANSI mode only, are
2-byte aligned. MPE/iX aligned long doubles are 8-byte aligned
within structures.
* MPE/V aligned enumerated data types are 2-byte aligned in a
structure, array, or union. MPE/iX aligned enumerated types are
always 4-byte aligned.
[REV END]
[REV
BEG]