Bit Operations [ SPL to HP C/XL Migration Guide ] MPE/iX 5.0 Documentation
SPL to HP C/XL Migration Guide
Bit Operations
Table 5-10. Bit Operations
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| | |
| SPL | HP C/XL Equivalent |
| | |
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| | |
| Bit operations can be used in any | Standard operators handle much of the bit |
| expression. They include bit extraction, | shifting and logical masking. Bit |
| bit concatenation or deposit, bit shifting, | extraction, concatenation, and some other |
| and logical masking. | manipulations will require user-supplied |
| | functions or #define directives. |
| | |
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Bit operations are commonly used in the limited-space MPE V system to
conserve space. With the increased memory of the MPE XL system, it may
be more efficient to rewrite bit operations to use full words, resulting
in both improved performance and a much more portable program.
NOTE While a simple BYTE variable is stored in bits 0-7 of a 16-bit
word, the bits are referenced in bit operations as 8-15.
Table 5-11 summarizes all the HP C/XL bitwise operators.
Table 5-11. HP C/XL Bit Operators
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| | |
| Operator | Operation |
| | |
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| | |
| op1 & op2 | bitwise AND of op1 and op2 |
| | |
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| | |
| op1 | op2 | bitwise inclusive OR of op1 and op2 |
| | |
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| | |
| op1 ^ op2 | bitwise exclusive OR of op1 and op2 |
| | |
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| | |
| op1 << op2 | shift op1 left op2 bits |
| | |
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| | |
| op1 >> op2 | shift op1 right op2 bits |
| | |
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| | |
| ~ op2 | bitwise negation of op2 |
| | |
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Bit Extraction
Table 5-12. Bit Extraction
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| | |
| SPL | HP C/XL Equivalent |
| | |
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| | |
| bit-extraction-operation: | No direct equivalent. |
| | |
| source . ( sbit : len ) | |
| | |
| source: | |
| is a 16-bit value. | |
| | |
| sbit, len: | |
| are values from 0 to 15. | |
| | |
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Step 1: Convert the SPL operation to a function procedure, such as
BEXTRACT shown in Figure 5-1.
__________________________________________________________________
| |
| LOGICAL PROCEDURE BEXTRACT ( SOURCE , SBIT , LEN ) ; |
| VALUE SOURCE , SBIT , LEN ; |
| LOGICAL SOURCE ; |
| INTEGER SBIT , LEN ; |
| BEGIN |
| BEXTRACT := ( SOURCE & LSL( SBIT ) ) & LSR( 16 - LEN ) ;|
| END ; |
__________________________________________________________________
Figure 5-1. SPL BEXTRACT Procedure: Bit Extraction
In the procedure, the formal parameter names correspond to the variables
in the syntax above. SOURCE is the word from which to extract bits, SBIT
is the starting bit, and LEN is the number of bits.
To use it, replace an expression like
Y.(10:4);
with
BEXTRACT(Y,10,4);
Step 2: Replace the SPL function with the #define macro directive in
Figure 5-2 or the HP C/XL function in Figure 5-3.
__________________________________________________________
| |
| #define BEXTRACT( SOURCE , SBIT , LEN ) \ |
| ( (unsigned short int) \ |
| ( ( (SOURCE) << (SBIT) ) ) >> ( 16 - (LEN) ) )|
__________________________________________________________
Figure 5-2. HP C/XL BEXTRACT Macro Directive: Bit Extraction
_____________________________________________________________
| |
| unsigned short int BEXTRACT( SOURCE , SBIT , LEN ) |
| unsigned short int SOURCE , SBIT , LEN ; |
| { |
| return ( (unsigned short int) |
| ( ( SOURCE << SBIT ) >> ( 16 - LEN ) ) ) ;|
| } |
_____________________________________________________________
Figure 5-3. HP C/XL BEXTRACT Function: Bit Extraction
Either the macro or the function may be executed with the same format as
the SPL function, e.g., "BEXTRACT(Y,10,4)", so further conversion is
unnecessary.
Bit Fields.
It is common practice in SPL to pack fields of bits into a single 16-bit
word, and refer to them with DEFINE declarations, such as:
__________________________________________________
| |
| LOGICAL WORD, A, B, C; |
| |
| DEFINE FIELD'A = (0:10)#, |
| FIELD'B = (10:4)#, |
| FIELD'C = (14:2)#; |
| ... |
| WORD := %(16)F30C; <<set all fields>> |
| A := WORD.FIELD'A; <<bits 0 through 9>> |
| B := WORD.FIELD'B; <<bits 10 through 13>>|
| C := WORD.FIELD'C; <<bits 14 through 15>>|
__________________________________________________
A similar operation may be performed in HP C/XL with union and struct
declarations:
_____________________________________________________
| |
| unsigned short A, B, C; |
| |
| union { |
| struct { |
| FIELD_A : 10; |
| FIELD_B : 4; |
| FIELD_C : 2; |
| } BITS; |
| unsigned short ALL16; |
| } WORD; |
| ... |
| WORD.ALL16 = 0xF30C; /*set all fields*/* |
| A = WORD.BITS.FIELD_A; /*bits 0 through 9*/ |
| B = WORD.BITS.FIELD_B; /*bits 10 through 13*/|
| C = WORD.BITS.FIELD_C; /*bits 14 through 15*/|
_____________________________________________________
Bit Concatenation (Merging)
Table 5-13. Bit Concatenation
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| | |
| SPL | HP C/XL Equivalent |
| | |
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| | |
| bit-concatenation-operation: | No direct equivalent. |
| | |
| dest CAT source ( dbit : sbit : len ) | |
| | |
| source: | |
| is a 16-bit value from which bits are | |
| extracted. | |
| | |
| dest: | |
| is a 16-bit value in which bits are | |
| deposited. | |
| | |
| dbit, sbit, len: | |
| | |
| are values from 0 to 15. | |
| | |
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The SPL CAT operation is a means of constructing a new 16-bit quantity
from two existing 16-bit words. A bit field is extracted from source and
deposited into a same-length field in dest. Thus:
A := %(16)ABCD;
B := %(16)1234;
X := A CAT B (4:8:4);
Bits 8 through 11 of word B are extracted and deposited in a copy of word
A, replacing bits 4 through 7. The resulting value equals %(16)A3CD. The
assignment places the value in X. A and B are unchanged.
Step 1: In the SPL program, convert the SPL operation to a function
procedure, such as BCONCAT shown in Figure 5-4 performs the same
operation.
_______________________________________________________________________
| |
| LOGICAL PROCEDURE BCONCAT( DEST , SOURCE , DBIT , SBIT , LEN ) ;|
| VALUE DEST , SOURCE , DBIT , SBIT , LEN ; |
| LOGICAL DEST , SOURCE ; |
| INTEGER DBIT , SBIT , LEN ; |
| BEGIN |
| LOGICAL M ; |
| LEN := 16 - LEN ; |
| M := ( %(16)FFFF & LSR( LEN ) ) & LSL( LEN - DBIT ) ; |
| BCONCAT := ( DEST LAND NOT( M ) ) LOR |
| ( IF DBIT < SBIT |
| THEN SOURCE & LSL( SBIT - DBIT ) |
| ELSE SOURCE & LSR( DBIT - SBIT ) LAND M ) ;|
| END ; |
_______________________________________________________________________
Figure 5-4. SPL BCONCAT Procedure: Bit Concatenation
In the procedure, DEST is the word where the bits will be deposited,
SOURCE is the word from which the bits will be extracted, DBIT is the
start bit in the destination word, SBIT is the start bit in the source
word, and LEN is the number of bits to be moved.
To use it, replace a CAT expression like
A CAT B (4:8:4)
with
BCONCAT(A,B,4,8,4)
Step 2: In the HP C/XL program, replace the SPL function procedure with
the HP C/XL function in Figure 5-5.
________________________________________________________________________________
| |
| unsigned short int BCONCAT( DEST , SOURCE , DBIT , SBIT , LEN ) |
| unsigned short int DEST , SOURCE , DBIT , SBIT , LEN ; |
| { |
| unsigned int TEMP ; |
| |
| LEN = 16 - LEN ; |
| TEMP = ( 0xFFFF >> LEN ) << ( LEN - DBIT ) ; |
| return( (unsigned short int) |
| ( ( DEST & ~TEMP ) | |
| ( ( DBIT < SBIT ? SOURCE << ( SBIT - DBIT ) |
| : SOURCE >> ( DBIT - SBIT ) ) & TEMP ) ) ) ;|
| } |
________________________________________________________________________________
Figure 5-5. HP C/XL BCONCAT Function: Bit Concatenation
The function may be executed with the same format as the SPL procedure,
e.g., "BCONCAT(A,B,4,8,4)", so further conversion is unnecessary.
Bit Shifts
Table 5-14. Bit Shift Operators
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| | |
| SPL | HP C/XL Equivalent |
| | |
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| | |
| bit-shift-operation: | bit-shift-operation: |
| | |
| operand & shift-op ( count ) | 1. operand << count |
| | |
| operand: | 2. operand >> count |
| is an arithmetic or logical primary. | |
| | Form 1 shifts the bits of operand left |
| shift-op: | count positions. The sign bit is lost. |
| is one of 17 shift operators, described | Zero bits are inserted on the right. Same |
| below. | as SPL's LSL and DLSL. |
| The shift operator is used to determine | |
| the participation of the sign bit, | Form 2 shifts the bits of operand right |
| regardless of the type of the operand. | count positions. If operand is unsigned, |
| | zero bits are inserted on the left. If |
| count: | operand is signed, the sign bit is extended |
| is the number of bits to shift. | on the left. Almost (but not quite) the |
| | same as SPL's LSR, DLSR, ASR, and DASR. |
| | |
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| | |
| Example: | Example: |
| | |
| operand is LOGICAL or INTEGER: | operand is unsigned short int or short int: |
| | |
| X := Y & LSL(4) ; | |
| | X = Y << 4 ; |
| | |
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Please notice that the examples above demonstrate the only simple exact
equivalents between SPL and HP C/XL.
Unlike SPL, the HP C/XL shift operators take note of the data type being
shifted, and behave differently for signed and unsigned data. To provide
operations similar to the SPL shift operators, some manipulation and type
casting are necessary. There are no circular shifts in HP C/XL, and
these must be emulated by iteration.
The best solution is to convert the operations to function calls and
#define macro references, in the form:
spl-shift-op( operand , count )
For example, the SPL expression:
Y & LSL(4)
would become the HP C/XL expression:
LSL(Y,4)
Suggested macro directives and functions are described in the following
sections.
NOTE If necessary, check the source code and ensure that the value of C
(count) is not negative in these macros and functions. You may
wish to use the HP C/XL abs (absolute value) function.
16-Bit Shift Operators.
The six SPL 16-bit (single-word) shift operators are described in Table
5-15.
Table 5-15. SPL 16-Bit Shift Operators
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| |
| shift-op Operation |
| |
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| |
| LSL logical shift left (sign not retained) |
| |
| LSR logical shift right (no sign extension) |
| |
| ASL arithmetic shift left (sign retained) |
| |
| ASR arithmetic shift right (sign extended) |
| |
| CSL circular shift left (rotate 16 bits left) |
| |
| CSR circular shift right (rotate 16 bits right) |
| |
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These operations may be performed in HP C/XL by the following #define
macro directives and function declarations. X represents the operand; C
represents the count.
______________________________________________________________________________
| |
| #define LSL(X,C) ((unsigned short int)((unsigned short int)(X) << (C)))|
______________________________________________________________________________
Figure 5-6. HP C/XL LSL Directive: Bit Shift Operation
______________________________________________________________________________
| |
| #define LSR(X,C) ((unsigned short int)((unsigned short int)(X) >> (C)))|
______________________________________________________________________________
Figure 5-7. HP C/XL LSR Directive: Bit Shift Operation
_______________________________________________________________________
| |
| #define ASL(X,C) ((short int)(((short int)(X) & 0x8000) \ |
| | ((short int)(X) << (C)) & 0x7FFF))|
_______________________________________________________________________
Figure 5-8. HP C/XL ASL Directive: Bit Shift Operation
____________________________________________________________
| |
| #define ASR(X,C) ((short int)((short int)(X) >> (C)))|
____________________________________________________________
Figure 5-9. HP C/XL ASR Directive: Bit Shift Operation
__________________________________________________________________________
| |
| unsigned short int CSL(X,C) |
| unsigned short int X; |
| int C; |
| { |
| for (;;--C) /*infinite loop, decrementing C after each iteration*/|
| { |
| if (C == 0) return(X); /*exit, returning X*/ |
| X = ((X & 0x8000) >> 15) | X << 1; |
| } |
| } |
__________________________________________________________________________
Figure 5-10. HP C/XL CSL Function: Bit Shift Operation
__________________________________________________________________________
| |
| unsigned short int CSR(X,C) |
| unsigned short int X; |
| int C; |
| { |
| for (;;--C) /*infinite loop, decrementing C after each iteration*/|
| { |
| if (C == 0) return(X); /*exit, returning X*/ |
| X = ((X & 0x0001) << 15) | X >> 1; |
| } |
| } |
__________________________________________________________________________
Figure 5-11. HP C/XL CSR Function: Bit Shift Operation
32-Bit Shift Operators.
The six SPL 32-bit (double-word) shift operators are described in Table
5-16.
Table 5-16. SPL 32-Bit Shift Operators
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| |
| shift-op Operation |
| |
-------------------------------------------------------------------------------------------
| |
| DLSL logical shift left (sign not retained) |
| |
| DLSR logical shift right (no sign extension) |
| |
| DASL arithmetic shift left (sign retained) |
| |
| DASR arithmetic shift right (sign extended) |
| |
| DCSL circular shift left (rotate 32 bits left) |
| |
| DCSR circular shift right (rotate 32 bits right) |
| |
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These operations may be performed in HP C/XL by the following #define
macro directives and functions. X represents the operand; C represents
the count.
___________________________________________________________________
| |
| #define DLSL(X,C) ((unsigned int)((unsigned int)(X) << (C)))|
___________________________________________________________________
Figure 5-12. HP C/XL DLSL Directive: Bit Shift Operation
___________________________________________________________________
| |
| #define DLSR(X,C) ((unsigned int)((unsigned int)(X) >> (C)))|
___________________________________________________________________
Figure 5-13. HP C/XL DLSR Directive: Bit Shift Operation
_________________________________________________________
| |
| #define DASL(X,C) ((int)(((int)X & 0x80000000) | \|
| ((int)X << (C)) & 0x7FFFFFFF)) |
_________________________________________________________
Figure 5-14. HP C/XL DASL Directive: Bit Shift Operation
_______________________________________________
| |
| #define DASR(X,C) ((int)((int)X >> (C)))|
_______________________________________________
Figure 5-15. HP C/XL DASR Directive: Bit Shift Operation
__________________________________________________________________________
| |
| unsigned int DCSL(X,C) |
| unsigned int X; |
| int C; |
| { |
| for (;;--C) /*infinite loop, decrementing C after each iteration*/|
| { |
| if (C == 0) return(X); /*exit, returning X*/ |
| X = ((X & 0x80000000) >> 31) | X << 1; |
| } |
| } |
__________________________________________________________________________
Figure 5-16. HP C/XL DCSL Function: Bit Shift Operation
__________________________________________________________________________
| |
| unsigned int DCSR(X,C) |
| unsigned int X; |
| int C; |
| { |
| for (;;--C) /*infinite loop, decrementing C after each iteration*/|
| { |
| if (C == 0) return(X); /*exit, returning X*/ |
| X = ((X & 0x00000001) << 31) | X >> 1; |
| } |
| } |
__________________________________________________________________________
Figure 5-17. HP C/XL DCSR Function: Bit Shift Operation
48-Bit Shift Operators.
The three SPL 48-bit (triple-word) shift operators are described in Table
5-17.
Table 5-17. SPL 48-Bit Shift Operators
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| |
| shift-op Operation |
| |
-------------------------------------------------------------------------------------------
| |
| TASL arithmetic shift left (sign retained) |
| |
| TASR arithmetic shift right (no sign extension) |
| |
| TNSL normalizing shift left |
| |
-------------------------------------------------------------------------------------------
Because there is no triple-word data type in MPE V (early versions of
LONG were three words), the use of these operations is extremely rare,
and is generally preceded by stack operations, which must be recoded in
HP C/XL. The TNSL operation normalizes a triple-word floating point
number, and is even more rare in SPL than the first two. If necessary,
these operations could be written in HP C/XL in a manner similar to the
examples above.
64-Bit Shift Operators.
Finally, the two SPL 64-bit (four-word) shift operators are described in
Table 5-18.
Table 5-18. SPL 64-Bit Shift Operators
-------------------------------------------------------------------------------------------
| |
| shift-op Operation |
| |
-------------------------------------------------------------------------------------------
| |
| QASL arithmetic shift left (sign retained) |
| |
| QASR arithmetic shift right (sign extended) |
| |
-------------------------------------------------------------------------------------------
Because the only four-word data type in SPL is LONG (a floating point
number in a format unique to the hardware for which SPL was designed),
any use of these operators would almost certainly have to be recoded.
They could, however, be emulated by slight modification of the DASL and
DASR macro directives above.
MPE/iX 5.0 Documentation