PPT Slide

IA-64 Floating-Point Architecture

• 128 registers
  • Allows parallel execution of multiple floating-point operations

• Simultaneous Multiply - Accumulate (FMAC)
  • 3-input, 1-output operation : a * b + c = d
  • Shorter latency than independent multiply and add
  • Greater internal precision and single rounding error

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Memory

128 FP

Register

File

Multiple read ports

Multiple write ports

. . .

. . .

FMAC #1

FMAC #2

A

B

C

D

X

+

(82 bit floating point numbers)

FMAC

FMAC

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